• Compile Worker starts, connects to Compile Server, registers with his functions
• Compile Server is waiting for jobs
• Dev. Env. is sending jobs to Compile Server

  • Compile Server hands jobs to Compile Worker

• Compile Server has to be publicly available
• Compile Worker doesn't have to be available via name/IP

• FPGA Compile Farm Server must be configured to accept ext. connections

• Open the FPGA Compile Farm Console: Open a Web browser and enter http://localhost:3580
• Click the Login link and enter a username and password to log into the console. By default, the username is admin and the password is left empty.
• Click the Security Configuration button in the left-hand pane to access the Security Configuration page.
• Click the Help link in the top-right corner of this page for information about configuring security.
• If you want to disallow external connections to the compile server, remove the checkmark from the Allow External Connections checkbox in the FPGA Compile Farm Console window.

With LabVIEW 2013 the FPGA Compile Farm Server uses port 3582. You will need to verify that his port isn't being blocked by adding an exception to the Windows Firewall or other port blocking software.

• installed on CentOS7 Compile-Worker
• connects to Compile-Server (see above)

…on an ESXi Server specifically, but applicable to any computer

• Check the required OS version for the compile worker

  • Look up the Compatibility between Xilinx Compilation Tools and NI FPGA Hardware
  • Find the Readme file for the required Compile Tools

    • LV2020 / Vivado 2019.1: CentOS 7.4/7.5/7.6 (64-bit)

• Setup the host OS

  • Upload iso to ESXI server and register a new VM, while attaching it as a new optical drive
  • For ISE workers, use the 32bit version, for Vivado use 64bit
  • Install CentOS with the wizard
  • Don't forget your root password!

• Download the required LabVIEW FPGA Compile Tool

  • Select the corresponding Application Bitness from the drop-down:

    • 32bit for ISE
    • 64bit for Vivado

• Upload and mount the iso to the now installed CentOS

• Copy all the files to another directory, because mounted isos are read-only

• Run chmod +x on the install script and then run it with root permissions

• Getting Started with the LabVIEW FPGA Compile Farm Toolkit
• LabVIEW FPGA Compile Worker Compile Time Benchmarks
• Setting up a Linux-based FPGA Compile Worker
• Compatibility between Xilinx Compilation Tools and NI FPGA Hardware

• LabVIEW 2020 FPGA Module Xilinx Compilation Tools for Linux Readme

A simple comparision of the FPGA compile time on some machines.

Software:

• Repository: hagemonitor-master
• File: FPGA_Main.vi
• Commit Hash: 6d6b379d85bc127e677d4f52d015843b206961e4
• Commit Info: 6d6b379d reworked PNIO for track settings

Hardware:

1. vSphere Server (ESXi) [4.0 GHz Core i7-6700, 16 GB 1600 MHz DDR3] - Compile worker on CentOS in VM [2 processors, 4 GB RAM].
2. iMac 27“ (Late ´15) [3.3 GHz Core i5, 24 GB 1600 MHz DDR3] - Compile worker on Win 7 in VM [2 processors, 8 GB RAM].
3. MacBook Pro 15” (Early ´13) [2,7 GHz Core i7, 16 GB 1600 MHz DDR3] - Compile worker on Win 7 in VM [1 processor 4 GB RAM].

• vSphere Server: 14m
• iMac (1. Lauf): 24m
• iMac (2. Lauf): 24m
• MacBook (1. Lauf): 50m
• MacBook (2. Lauf): 52m